A Test chip approach to routine process control

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Title: A Test chip approach to routine process control
Author: Meisenzahl, Eric J.
Abstract: A procedure for determining process control and yield prediction is presented which primarily serves to evaluate the quality and repeatability of critical fabrication steps, but also serves to quantify process capabilities and limitations for future design considerations. This can be accomplished through the use of a specially designed test chip. The test chip is designed for use in determining the process control and fabrication capability of the Microelectronic Engineering Department's fabrication lab of Rochester Institute of Technology.
Record URI: http://hdl.handle.net/1850/10562
Date: 1988-03

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