Line balancing and productivity improvements in electronics assembly using modeling and simulation techniques

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Title: Line balancing and productivity improvements in electronics assembly using modeling and simulation techniques
Author: Ramkumar, S. Manian
Abstract: The study presented in this paper was to model, simulate and analyze the performance of three existing assembly lines, in an electronics assembly facility, and suggest modifications to the lines, in order to improve machine utilization, line balancing and system throughput. The facility is currently equipped with two identical SMT lines, for surface mount assembly and a third line with glue dispense, for mixed technology assemblies. This facility specializes in high-mix low-volume manufacturing and assembles double sided SMT or mixed technology assemblies (approximately 150-200,000 equivalent single-sided PCB assemblies per year). The SMT lines in the facility consist of a DEK 265 Stencil Printer, a Fuji CP4 Chip Shooter, a Fuji IP2 Flexible placement machine, a hand assembly station and a Reflow Oven. The glue dispense line consists of a Fuji glue dispense machine, a Fuji CP3 Chip Shooter and a glue cure oven. One alternate system configuration to the existing setup, presented in this paper, consists of combining the three lines into two, one for SMT assembly and another for SMT and mixed technology assembly (with glue dispense), thereby reducing floor space and also eliminating the glue cure oven. The SMT line in the alternate setup, would consist of a DEK 265 Stencil Printer, a Fuji CP4 Chip Shooter, a Fuji CP3 Chip Shooter, a Fuji IP2 Flexible placement machine, a hand assembly station and a Reflow Oven. The combined SMT and Glue dispense line would consist of a DEK 265 Stencil Printer, a Fuji Glue dispense machine, a Fuji CP4 Chip Shooter, a Fuji IP2 Flexible placement machine, a hand assembly station and a Reflow Oven. Specific issues that were to be addressed, by the simulation study, included the following: * Time spent by PCBs in the Process * Work in Process * Throughput * Equipment Utilization * Number of shifts of operation required Details pertaining to the modeling and simulation of these systems and the findings of the study are presented in the following sections.
Description: "Line Balancing and Productivity Improvements in Electronics Assembly Using Modeling and Simulation Techniques," SMTA Pan Pacific Microelectronics Symposium. Held at Maui, Hawaii: February 2002.
Record URI: http://hdl.handle.net/1850/8608
Date: 2002

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