Overgrown Si/SiGe resonant interband tunnel diodes for integration with CMOS

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Title: Overgrown Si/SiGe resonant interband tunnel diodes for integration with CMOS
Author: Sudirgo, Stephen; Vega, Reinaldo; Nandgaonkar, Rohit; Hirschman, Karl; Rommel, Sean; Kurinec, Santosh; Thompson, Phillip; Jin, Niu; Berger, Paul
Abstract: The incorporation of tunnel diodes with field effect transistors (FET) can improve the speed and power capability in electronic circuitry. This has been realized in III-V materials by demonstrating a low power refresh-free tunneling-SRAM and high performance compact A/D converter. A new thrust to integrate tunnel diodes with the mainstream CMOS technology led to the invention of Si/SiGe resonant interband tunnel diode (RITD) (S.L. Rommel et al., Appl. Phys. Lett., vol. 73, pp. 2191-93, 1998) with the highest reported peak-to-valley current ratio (PVCR) of 6.0 (K. Eberl, J. Crystal Growth, 227-228, pp. 770-76, 2001). The structure consists of a SiGe spacer i-layer sandwiched between two delta-doped planes grown by low-thermal molecular beam epitaxy (LT-MBE) (N. Jin et al., IEEE Trans. Elec. Dev., vol. 50, pp.1876-1884, 2003). By adjusting the spacer layer thickness, the peak current density (Jp) can be adjusted from 0.1 A/cm 2 up to 151 kA/cm2 (N. Jin et al., App. Phys. Lett., 83, pp. 3308-3310, 2003). Recently, monolithic integration of RITD with CMOS has been realized, demonstrating a low-voltage operation of a monostable-bistable logic element (MOBILE) (S.Sudirgo et al., Proc. 2003 Int. Semic. Dev. Res. Symp., pp. 22, 2003). In this study, RITD layers were grown through openings in a 300 nm thick chemical vapor deposition (CVD) SiO2 layer.
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Record URI: http://hdl.handle.net/1850/9976
Date: 2004-06

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