Development and characterization of 10 nm, n2-implanted nitrided oxides for gate dielectrics

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Title: Development and characterization of 10 nm, n2-implanted nitrided oxides for gate dielectrics
Author: Jackson, Michael; Kurinec, Santosh; Capasso, Keith
Abstract: A 20 nm, Al-gate SiO, MOS capacitor process exists at Rochester Institute of Technology (RI") which produces yields 2 90% for a performance spec of 1 9 MV/cm field strength for dielectric breakdown. Scaling the dielectric thickness down below 10 nm resulted in a corresponding decrease in dielectric strength performance with 8 nm films exhibiting mean dielectric strength values of only 2 MVlcm. An increase in leakage currents accompanies this degradation in dielectric integrity. Switching to a polysilicon gate for sub 20 nm oxides restores the dielectric strength performance, but the additional levels of processing associated with LOCOS and polysilicon gates is not conducive to rapid evaluation of dielectric integrity. A nitrided oxide, formed by ion implantation, has been shown to result in mean dielectric strength values 2 9 MV/cm for Al-gate MOS capacitors with dielectric thicknesses down to 10 nm. Preliminary XPS data indicates that the nitrided film is more resistant to defect formation, and this may explain the enhanced performance.
Description: Copyright 1999 IEEE.  Personal use of this material is permitted.  However, permission to reprint/republish this  material for advertising or promotional  purposes or for creating new collective  works for resale or redistribution to  servers or lists, or to reuse any  copyrighted component of this work in other  works must be obtained from the IEEE. 
Record URI: http://hdl.handle.net/1850/9999
Date: 1999-06

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